CSIMarket
 
Cadence Design Systems Inc   (NASDAQ: CDNS)
    Sector  Technology    Industry Software & Programming
   Industry Software & Programming
   Sector  Technology
 
Price: $287.9250 $2.97 1.044%
Day's High: $288.9700012207031 Week Perf: -1.63 %
Day's Low: $ 285.02 30 Day Perf: -10.9 %
Volume (M): 274,980 52 Wk High: $ 416.69
Volume (M$): $ 0 52 Wk Avg: $328.77
Open: $288.18 52 Wk Low: $262.75



 Market Capitalization (Millions $) 78,812
 Shares Outstanding (Millions) 274
 Employees 13,800
 Revenues (TTM) (Millions $) 5,529
 Net Income (TTM) (Millions $) 1,171
 Cash Flow (TTM) (Millions $) -1,371
 Capital Exp. (TTM) (Millions $) 168

Business Description


We enable our customers to design electronic products. Our products and services are designed to give our customers a competitive edge in their development of electronic systems, integrated circuits (“ICs”), electronic devices and increasingly sophisticated manufactured products. Our products and services do this by optimizing performance, minimizing power consumption, shortening the time to bring our customers’ products to market and reducing their design, development and manufacturing costs. Our customers create and sell electronic products at differing levels of completeness. Our electronic systems customers deliver entire devices, such as smartphones, laptop computers, gaming systems, automobiles, servers, medical equipment and networking products. These systems companies internally develop, or externally purchase, the sub-components for their products, including printed circuit boards (“PCBs”), which interconnect all the hardware components, ICs, which are often referred to as computer chips, and software at various levels which runs on the hardware. Our semiconductor customers deliver ICs, which include subcategories, such as memory chips, systems-on-chip (“SoCs”), analog chips, processors and other types of chips.

We offer software, hardware, services and reusable IC design blocks, which are commonly referred to as intellectual property (“IP”). Systems customers use our offerings to develop and integrate software that is key to the functionality of their products, as well as to design their ICs and PCBs. Our semiconductor customers use our offerings to design, configure, analyze and verify ICs. Additionally, some customers license our IP, which accelerates their product development processes by providing pre-designed and verified circuit blocks for their ICs.
Our strategy, which we call System Design Enablement (“SDE”), is to provide the technologies necessary for our customers to develop a complete and functional electronic product. Our SDE strategy enables us to address the growing trends of electronic systems companies developing their own ICs as part of their end product systems, as well as semiconductor companies delivering greater portions of the systems into which their IC products are integrated. The development of electronic products, or their sub-components, is complex and requires many engineers using our solutions with specialized knowledge and skill. The rate of technical innovation in electronics is swift, long driven by a concept known as Moore’s Law, which more than 50 years ago predicted that the complexity of ICs would double about every 24 months. In order to make our customers successful, our products must handle this exponential growth rate in complexity, without requiring a corresponding increase in our customers’ costs. Historically, the industry that provided the tools used by IC engineers was referred to as Electronic Design Automation (“EDA”). Today, our offerings include and extend beyond EDA tools to include SDE.

Our SDE solutions facilitate the electronic product creation process at four levels. First, our core EDA offerings enable engineers to complete tasks associated with the design, analysis and verification of ICs. Core EDA tools and services are specifically designed to meet the requirements of engineers who develop different types of ICs. The second level of SDE solutions is IP, which consists of design IP and verification IP (“VIP”). Design IP is directly integrated into the IC by the customer as part of its development process. VIP consists of technologies and methodologies useful for verifying how design IP is integrated into the IC, but VIP does not become part of the IC product. The third level of SDE solutions is System Interconnect, and includes tools and services used for the design, analysis and verification of PCBs, as well as the packages that encapsulate the ICs for electrical and physical connection to the PCB. The fourth level of SDE solutions is System Integration, which includes the engineering tasks associated with designing and analyzing systems, verifying system functionality, combining software with hardware, or developing new software for an IC or system prior to its manufacture.

Our products and services enable our customers to design complex and innovative electronic products, so demand for our products is driven by our customers’ investment in new designs and products. The most promising new opportunities for us involve enabling the design of electronic systems for machine learning, augmented reality, virtual reality, internet-of-things, aerospace and defense and autonomous vehicle sub-systems. Large and existing electronics categories, such as datacenter servers, smartphones and networking products continue to provide business opportunities for us as customers initiate new design projects. Conversely, the decline of previously vibrant categories, and the integration of previously separate capabilities into a single device, can potentially reduce our business opportunities. For example, digital cameras and navigation devices were once independent devices, and are now also available as features on a smartphone. Likewise, the laptop computer category has been negatively affected by the proliferation of mobile devices.


Underlying the requirements within any particular vertical market sector is the availability of rapidly improving IC manufacturing technology. In order for our customers to take advantage of such advancements, certain of our products must first be developed to exploit these new manufacturing capabilities. This dependency means that we must invest significantly in product research and development to keep pace with the latest manufacturing technology. The demand for new IC manufacturing technology directly impacts the demand for our newest products.


Another driver for our business is the differentiation, capabilities and benefits provided to our customers by our products. With the rapid pace of innovation comes the opportunity for our products to address key challenges associated with electronic product creation, such as power consumption, performance and cost. Our products have unique attributes that our customers value. In general, these attributes can be grouped into broader categories such as quality of results (in terms of power consumption, performance and chip area), engineering productivity, tool performance, new capabilities or methods and faster time-to-market. Our business opportunities are significantly enhanced when our offerings address these key factors.

Functional verification products are used by our customers to efficiently and effectively verify that the circuitry or the software they have designed will perform as intended. Verification takes place before implementing or manufacturing the circuitry, significantly reducing the risk of discovering an error in the completed product. Our functional verification offering consists of four primary verification engines:

JasperGold® formal verification platform

Xcelium™ parallel simulation platform

Palladium® Z1 verification computing platform

Protium™ S1 FPGA prototyping platform
These engines are used for early bug detection, verification of block-level functionality, verification acceleration and emulation of system-level functionality, system-level power exploration, analysis and optimization and system-level prototyping for hardware/software co-verification. Our emulation hardware offering--the Palladium Z1 enterprise emulation system--provides high throughput, capacity, datacenter reliability and workgroup productivity to enable global design teams to develop advanced hardware-software systems. The Protium S1, a prototyping solution based on Field-Programmable Gate Arrays (“FPGAs”), leverages a common front end with Palladium Z1 in order to move designs rapidly from emulation to the prototyping stage for early software development.


Also included in our functional verification offering are products that are used for verification planning and metric tracking, testbench automation, debugging and software-driven tests. These products enable our customers to coordinate verification activities across multiple teams and various specialists for verification planning and closure.

Digital IC Design and Signoff
Digital IC design offerings are used by our customers to create logical representations of a digital circuit or an IC that can be verified for correctness prior to implementation (please refer to the discussion under “Functional Verification, including Emulation and Prototyping Hardware” above). Once the logic is verified, the design representation is implemented, or converted to a format ready for silicon manufacturing, using additional software tools within this category. The manufacturing representation is also analyzed and verified. Our digital IC offerings include three major categories: logic design, physical implementation and signoff.


Our logic design offering is comprised of logic synthesis, test and equivalence checking capabilities and is typically used by customers to create and verify designs in conjunction with our functional verification capabilities. This offering provides chip planning, design, verification and test technologies and services to customers. The offering includes the Genus™ synthesis solution, a logic synthesis offering that provides fast throughput while also offering high quality results, the Stratus™ high-level synthesis solution for system-level synthesis, and the Joules™ RTL power solution, which delivers fast power analysis while preserving near-signoff accuracy. We also offer the Modus™ design-for-test software solution, which reduces SoC test time.
Our physical implementation offering comprises tools used near the end of the design process, including place and route, signal integrity, optimization and multiple patterning preparation. The Innovus™ implementation system is a physical implementation offering that delivers fast design turnaround time while also delivering improved power, performance and area characteristics. This offering enables customers to address the technology challenges of the latest semiconductor advanced process nodes, create a physical representation of logic models and prepare a design for signoff.


Our signoff offering is comprised of tools used to signoff the design as ready for manufacture by a silicon foundry, which provides certification for this step. This offering includes Tempus™ timing analysis, Voltus™ power analysis, Quantus™ QRC extraction solutions and Pegasus™ physical verification system. Our design for manufacturing products are also included in our signoff offering and are used by customers to address manufacturing and yield issues as early in the product development process as possible.

Custom IC Design and Verification
Custom IC design and verification offerings are used by our customers to create schematic and physical representations of circuits down to the transistor level for analog, mixed-signal, custom digital, memory and radio frequency (“RF”) designs. These representations are verified using simulation tools optimized for each type of design. The offering includes the design capture environment, simulation and IC layout capabilities within the Virtuoso® custom design platform. Other tools in the custom IC portfolio are used to prepare the designs for manufacturing.

 

Virtuoso Advanced Node adds functionality to the base Virtuoso package to enable the use of three-dimensional transistors (“FinFETs”), multiple patterning and other technologies required for advanced designs. Virtuoso for Electrically Aware Design introduces a new time-saving paradigm that shortens the loop between design and verification by verifying designs as they are being created. Spectre® XPS is a Fast SPICE offering that speeds verification time over previously existing solutions. Virtuoso System Design Platform enables engineers to design and verify concurrently across the chip, package and board. Finally, Legato Memory Solution is the industry’s first integrated solution for memory design and verification.

System Interconnect and Analysis
Our System Interconnect and Analysis offerings are used by our customers to develop PCBs and IC packages. The capabilities in the Allegro® system interconnect design platform include PCB authoring and implementation, IC package and System-in-Package design and signal and power integrity analysis and PCB library design management and collaboration. Certain offerings also include the simulation capability within the Virtuoso custom design platform. Sigrity™ analysis tools have been integrated with our Allegro platform, enabling a comprehensive front-to-back flow for implementation and full signal and power integrity analysis for designs featuring high speed interface protocols. These offerings enable engineers who are responsible for the capture, layout and analysis of advanced PCB and IC packages to design high-performance electronic products across the domains of ICs, IC packages and PCBs, to increase functional density and to manage design complexity while reducing cost and time-to-market. The need for compact, high performance mobile, consumer and automotive design with advanced serial interconnect is driving technology evolution for our PCB offering. For mainstream PCB customers, where individual or small team productivity is a focus, we provide the OrCAD® family of offerings that is primarily marketed worldwide through a network of resellers.

IP
Our design IP offerings consist of pre-verified, customizable functional blocks, which customers integrate into their ICs to accelerate the development process and to reduce the risk of errors in the design process. We offer many types of design IP, including Tensilica® configurable digital signal processors vertically targeted subsystems for audio/voice, baseband and vision/imaging applications, controllers and physical interfaces for standard protocols and analog IP. We have significantly expanded our design IP portfolio in recent years through acquisitions and internal development. During the fourth quarter of fiscal 2017, we acquired nusemi inc, a company focused on the development of ultra-high-speed Serializer/Deserializer (“SerDes”) communications IP.


We also offer a broad range of VIP and memory models, which model the expected behavior of many industry standard protocols when used with verification solutions and are complementary to our design IP offerings. VIP and accelerated VIP, which is used in emulation, are used across the suite of functional verification engines to verify the correct interaction with dozens of design IP interface protocols such as DDR, USB and PCI Express. Our VIP offerings are also used in system-level verification to model correct behavior of full systems interacting with their environments.

Product Arrangements
We primarily license our software using time-based licenses. Our time-based license arrangements offer customers the right to access and use all of the products delivered at the outset of an arrangement and updates throughout the entire term of the arrangement, which is generally two to three years, with no rights to return. Our updates provide for continued access to our evolving technology as our customers’ designs migrate to more advanced nodes. In addition, certain time-based license arrangements include:

the right for the customer to remix among the products delivered at the outset of the arrangement, so long as the cumulative contractual value of all products in use does not exceed the total license fee determined at the outset of the arrangement; and

use of unspecified additional products that become commercially available during the term of the arrangement.
A small portion of our software is licensed under perpetual licenses, which does not include the right to use new technology. Payment terms for time-based licenses generally provide for payments to be made over the license period and payment terms for perpetual licenses generally are net 30 days.

Our emulation and prototyping hardware products are either sold or leased to our customers.
We generally license our design IP under nonexclusive license agreements that provide usage rights for specific designs. In addition, for certain of our IP license agreements, we collect royalties as our customers ship their product that includes our IP to their customers.

Technical Support and Maintenance
Customer service and support is critical to the adoption and successful use of our products. We provide our customers with technical support and maintenance to facilitate their use of our software, hardware and IP solutions.

Services
We offer a number of services, including services related to methodology, education and hosted design solutions. These services may be sold separately or sold and performed in conjunction with the license, sale or lease of our products. As necessary, certain of our design services engineers are assigned to internal research and development projects associated with our design IP business.


As part of our services offerings, we design advanced ICs, develop custom IP and address industry design issues that may not be solved adequately by today’s EDA technologies. This enables us to target and accelerate the development of new software technology and products to satisfy current and future design requirements.
We offer engineering services to collaborate with our customers in the design of complex ICs and the implementation of key design capabilities, including low power design, IC packaging and board design, functional verification, digital implementation, analog/mixed-signal design and system-level design. The customers for these services primarily consist of semiconductor and systems companies developing products for the consumer, communications, military, aerospace and computing markets. These ICs range from digital SoCs and analog and RF designs to complex mixed-signal ICs.


In delivering methodology services, we leverage our experience and knowledge of design techniques, our products, leading practices and different design environments to improve the productivity of our customers’ engineering teams. Depending on the customers’ projects and needs, we work with customers using outsourcing, consultative and collaborative offerings.
Our education services offerings can be customized and include training programs that are conducted via the internet or in a classroom setting. The content of these offerings ranges from the latest IC design techniques to methodologies for using the most recent features of our EDA products. The primary focus of education services is to accelerate our customers’ path to productivity in the use of our products.



   Company Address: 2655 Seely Avenue, Building 5, San Jose, 95134 CA
   Company Phone Number: 943-1234   Stock Exchange / Ticker: NASDAQ CDNS


Customers Net Income grew by CDNS's Customers Net Profit Margin grew to

26.18 %

6.52 %

• Customers Performance • Customers Expend. • Customers Efficiency • List of Customers


   

Stock Performances by Major Competitors

5 Days Decrease / Increase
     
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AMKR        8.29% 
ESE   -0.83%    
KEYS        4.64% 
• View Complete Report
   





Fundamental Analysis

Valuation Current
Price to Earnings PE Ratio (TTM) 67.07
Price to Earnings PE Ratio (Expected) -
Price to Sales (TTM) 14.26
Price to Sales (Expected) -
Price to Book 12.01
PEG (TTM) 7.73

Financial Strength Current
Quick Ratio 1.09
Working Capital Ratio 2.47
Leverage Ratio (MRQ) 0.57
Total Debt to Equity 0.44
Interest Coverage (TTM) 16.58
Debt Coverage (TTM) 0.76

Per Share Current
Earnings (TTM) 4.29 $
Revenues (TTM) 20.2 $
Cash Flow (TTM) -
Cash 5.14 $
Book Value 23.97 $
Dividend (TTM) 0 $

Efficiency Current
Revenue per Employee (TTM) 400,624
Net Income per Employee (TTM) 84,853
Receivable Turnover Ratio (TTM) 6.5
Inventory Turnover Ratio (TTM) 1.96
Asset Turnover Ratio (TTM) 0.53

Profitability Ratios Current
Gross Margin (MRQ) 89.6 %
Operating Margin (MRQ) 29.26 %
Net Margin (MRQ) 22.77 %
Net Cash Flow Margin (MRQ) -108.17 %
Effective Tax Rate (TTM) 26.56 %

Management Effectiveness Current
Return On Assets (TTM) 11.32 %
Return On Investment (TTM) 14.49 %
Return On Equity (TTM) 21.06 %
Dividend Yield -
Pay out Ratio (TTM) -



Cadence Design Systems Inc's Segments
Core EDA    0 % of total Revenue
Semiconductor IP    0 % of total Revenue
System Design and Analysis    0 % of total Revenue
Transferred over time    0 % of total Revenue
Transferred over time Revenue arrangement recognized over time    0 % of total Revenue
Transferred over time Other recurring revenue    0 % of total Revenue
Transferred at point in time    0 % of total Revenue
Reportable Segment    100 % of total Revenue
United States    85.26 % of total Revenue
Other Americas    3.75 % of total Revenue
Americas    90.52 % of total Revenue
China    28.87 % of total Revenue
Other Asia    41.82 % of total Revenue
Asia    84.07 % of total Revenue
EMEA    32.88 % of total Revenue
Japan    13.39 % of total Revenue
Product and maintenance    188.55 % of total Revenue
Technology Service    18.93 % of total Revenue
Reportable    207.48 % of total Revenue
Other America    5.26 % of total Revenue





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